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 WED8L24514V
SRAM, 3.3V, Asynchronous SRAM, 3.3V, 512Kx24
FEATURES DESCRIPTION
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512Kx24 bit CMOS Static Random Access Memory Array * Fast Access Times: 10, 12, and 15ns * Master Output Enable and Write Control * Three Chip Enables for Byte Control * TTL Compatible Inputs and Outputs * Fully Static, No Clocks
The WED8L24514VxxBC is a 3.3V, twelve megabit SRAM constructed with three 512Kx8 die mounted on a multilayer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V operating voltage, the WED8L24514V is ideal for creating a single chip memory solution for the Motorola DSP5630x or a two chip solution for the Analog Devices SHARC TM DSP. The single or dual chip memory solutions offer improved system performance by reducing the length of board traces and the number of board connections compared to using multiple monolithic devices. The JEDEC Standard 119 lead BGA provides a 61% space savings over using three 512Kx8, 400 mil wide SOJs and the BGA package has a maximum height of 110 mils compared to 148 mils for the SOJ packages.
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Surface Mount Package * 119 Lead BGA (JEDEC MO-163), No. 391 * Small Footprint, 14mmx22mm * Multiple Ground Pins for Maximum Noise Immunity
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Single +3.3V (5%) Supply Operation DSP Memory Solution * Motorola DSP5630x * Analog Devices SHARC TM
FIG. 1 PIN CONFIGURATION
PIN SYMBOLS
PIN NAMES
1 A B C D E F G H J K L M N P R T U NC NC I/012 I/013 I/014 I/015 I/016 I/017 NC I/018 I/019 I/020 I/021 I/022 I/023 NC NC
2 AO A5 NC VCC GND VCC GND VCC GND VCC GND VCC GND VCC A18 A9 A13
3 A1 A6 E2 GND VCC GND VCC GND VCC GND VCC GND VCC GND NC A10 A14
4 A2 E0 NC GND GND GND GND GND GND GND GND GND GND GND NC W G
5 A3 A7 E3 GND VCC GND VCC GND VCC GND VCC GND VCC GND NC A11 A15
6 A4 A8 NC VCC GND VCC GND VCC GND VCC GND VCC GND VCC A17 A12 A16
7 NC NC I/00 I/01 I/02 I/03 I/04 I/05 NC I/06 I/07 I/08 I/09 I/010 I/011 NC NC
A0-18 E W G DQ0-23 VCC GND NC
Address Inputs Chip Enable Master Write Enable Master Output Enable Common Data Input/Output Power (3.3V 5%) Ground No Connection
BLOCK DIAGRAM
A0-A18 G W E0 E2 E3
19
512K x 24 Memory Array
DQ0-7 DQ8-15 DQ16-23
September 2001 Rev. 2 ECO #14670
1
White Electronic Designs Corporation * (508) 366-5151 * www.whiteedc.com
WED8L24514V
ABSOLUTE MAXIMUM RATINGS RECOMMENDED DC OPER ATING CONDITIONS Parameter Sym Min Typ Max Units
Voltage on any pin relative to VSS -0.5V to 4.6V Operating Temperature TA (Ambient) Commercial 0C to + 70C Industrial -40C to +85C Storage Temperature -55C to +125C Power Dissipation 1.5 Watts Output Current. 50 mA *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Supply Voltage Supply Voltage Input High Voltage Input Low Voltage
VCC VSS VIH VIL
3.135 0 2.2 -0.3
3.3 0 -- --
3.465 0 VCC+0.3 0.8
V V V V
FIG. 2
FIG. 3
VCC
Q
Z0 == 50 Z0 50 65 pF DOUT
353
319
RL = 50
AC TEST CONDITIONS
5 pF
VL = 1.5V
Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load
VSS to 3.0V 5ns 1.5V Figure 2
NOTE: For tEHQZ,tGHQZ and tWLQZ, Figure 3
DC ELECTRIC AL CHAR ACTERISTICS
Parameter
Sym
Conditions
Min 10ns
Max 12 - 15ns
Units
Operating Power Supply Current Standby (TTL) Supply Current Full Standby CMOS Supply Current Input Leakage Current Output Leakage Current Output High Volltage Output Low Voltage
ICC1 ICC2 ICC3
ILI ILO VOH VOL
W= VIL, II/O = 0mA, Min Cycle E > VIH, VIN < VIL or VIN > VIH, f=OMHz E > VCC - 0.2V VIN > VCC - 0.2V or VIN < 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 4.0mA
450 150 90
350 150 90
mA mA mA
10 10 2.4 0.4
10 10 0.4
A A V V
TRUTH TABLE
G E0 E2 E3 W Mode Output Power
X H L L L L X X X X
H L L L H H L L H H
H L L H L H L H L H
H L L H H L L H H L
X H H H H H L L L L
Standby Output Deselect Read (24 bit) Read Read Read Write (24 bit) Write Write Write
High Z High Z DOUT DQ0-7 DQ8-15 DQ16-23 DIN DQ0-7 DQ8-15 DQ16-23
ICC2,ICC3 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1 ICC1
CAPACITANCE (f=1.0MHZ, VIN=VCC
Parameter Sym OR
VSS)
Max Unit
Address Lines Data Lines Write & Output Enable Lines Chip Enable Lines
CA CD/Q W, G EO, E2, E3
8 10 8 8
pF pF pF pF
These parameters are sampled, not 100% tested.
White Electronic Designs Corporation * Westborough, MA * (508) 366-5151
2
WED8L24514V
AC CHARACTERISTICS READ CYCLE
Symbol Parameter JEDEC Alt. 10ns Min Max 12ns Min Max 15ns Min Max Units
Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z1 Chip Disable to Output in High Z1 Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z1 Output Disable to Output in High Z1
tAVAV tAVQV tELQV tELQX tEHQZ tAVQX tGLQV tGLQX tGHQZ
tRC tAA tACS tCLZ tCHZ tOH tOE tOLZ tOHZ
10 10 10 3 5 3 5 0 5
12 12 12 3 6 3 6 0 6
15 15 15 3 7 3 7 0 7
ns ns ns ns ns ns ns ns ns
NOTE 1: Parameter is guaranteed, but not tested.
FIG. 4 READ CYCLE 1 - W HIGH, G, E LOW
tAVAV
A
ADDRESS 1 ADDRESS 2
tAVQV
Q
tAVQX
DATA 1 DATA 2
FIG. 5 READ CYCLE 2 - W HIGH
tAVAV
A
tAVQV
E
tELQV tELQX
G
tEHQZ
tGLQV tGLQX
Q
tGHQZ
3
White Electronic Designs Corporation * (508) 366-5151 * www.whiteedc.com
WED8L24514V
AC CHAR ACTERISTICS WRITE CYCLE
Symbol Parameter JEDEC Alt. Min 10ns Max 12ns Min Max 15ns Min Max Units
Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z1 Data to Write Time Output Active from End of Write1
tAVAV tELWH tELEH tAVWL tAVEL tAVWH tAVEH tWLWH tWLEH tWHAX tEHAX tWHDX tEHDX tWLQZ tDVWH tDVEH tWHQX
tWC tCW tCW tAS tAS tAW tAW tWP tWP tWR tWR tDH tDH tWHZ tDW tDW tWLZ
10 8 8 0 0 8 8 8 8 0 0 0 0 0 5 5 3
5
12 9 9 0 0 9 9 10 10 0 0 0 0 0 6 6 3
6
15 9 9 0 0 10 10 11 11 0 0 0 0 0 7 7 3
7
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
NOTE 1: Parameter is guaranteed, but not tested.
FIG. 6
WRITE CYCLE 1 - W CONTROLLED
tAVAV
A
tAVWH tELWH
E
tWHAX
tAVWL
W
tWLWH tDVWH tWHDX
D
DATA VALID
tWLQZ
Q
HIGH Z
tWHQX
White Electronic Designs Corporation * Westborough, MA * (508) 366-5151
4
WED8L24514V
FIG. 7 WRITE CYCLE 2 - E CONTROLLED
tAVAV
A
tAVEH tELEH
E
tEHAX
tAVEL
W
tWLEH tDVEH tEHDX
D Q
HIGH Z
DATA VALID
ORDERING INFORMATION
Commercial (0C to +70C)
Par t Number Speed (ns) Package No.
Industrial (-40C to +85C)
Par t Number Speed (ns) Package No.
WED8L24514V10BC WED8L24514V12BC WED8L24514V15BC
10 12 15
391 391 391
WED8L24514V12BI WED8L24514V15BI
12 15
391 391
PACKAGE NO. 391 119 LEAD BGA JEDEC MO-163
5
White Electronic Designs Corporation * (508) 366-5151 * www.whiteedc.com


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